A CMOS imager circuit includes a focal plane array of pixel cells, each cell includes a photosensor, for example, a photogate, photoconductor or a photodiode overlying a substrate for producing a photo-generated charge in a doped region of the substrate. A readout circuit is provided for each pixel cell and includes at least a source follower transistor and a row select transistor for coupling the source follower transistor to a column output line. The pixel cell also typically has a floating diffusion node, connected to the gate of the source follower transistor. Charge generated by the photosensor is sent to the floating diffusion region. The imager may also include a transistor for transferring charge from the photosensor to the floating diffusion node and another transistor for resetting the floating diffusion region node to a predetermined charge level prior to charge transference. Each pixel cell is isolated from other pixel cells in the array by a field oxide region (STI) which surrounds it and separates the doped regions of the substrate within that pixel cell from the doped regions of the substrate within neighboring pixel cells.
In a CMOS imager, the active elements of a pixel cell, for example a four transistor pixel, perform the necessary functions of (1) photon to charge conversion; (2) resetting the floating diffusion node to a known state before the transfer of charge to it; (3) transfer of charge to the floating diffusion node; (4) selection of a pixel cell for readout; and (5) output and amplification of a signal representing a reset voltage and a pixel signal voltage based on the photo converted charges. The charge at the floating diffusion node is converted to a pixel output voltage by a source follower output transistor.
FIG. 1 illustrates a block diagram of a CMOS imager device 100 having a pixel array 110 with each pixel cell being constructed as described above. The pixel array 110 comprises a plurality of pixels arranged in a predetermined number of columns and rows. The pixels of each row in the array 110 are all turned on at the same time by a row select line, and the pixels of each column are selectively output by respective column select lines. A plurality of row and column lines are provided for the entire array 110. The row lines are selectively activated by a row driver 145 in response to a row address decoder 155. The column select lines are selectively activated by a column driver 160 in response to a column address decoder 170. Thus, a row and column address is provided for each pixel.
The CMOS imager 100 is operated by a control circuit 150 that controls address decoders 155, 170 for selecting the appropriate row and column lines for pixel readout, and row and column driver circuitry 145, 160 that apply driving voltage to the drive transistors of the selected row and column lines. The pixel column signals, which typically include a pixel reset signal Vrst and a pixel image signal Vsig for each row selected pixel in a column are read by sample and hold circuitry 161 associated with the column device 160. A differential signal Vrst-Vsig is produced for each pixel, which is amplified and digitized by analog-to-digital converter 175. The analog-to-digital converter 175 converts the analog pixel signals to digital signals that are fed to an image processor 180 to form a digital image output.
Exemplary CMOS imaging circuits, processing steps thereof, and detailed descriptions of the functions of various CMOS elements of an imaging circuit are described, for example, in U.S. Pat. No. 6,140,630, U.S. Pat. No. 6,376,868, U.S. Pat. No. 6,310,366, U.S. Pat. No. 6,326,652, U.S. Pat. No. 6,204,524, and U.S. Pat. No. 6,333,205, assigned to Micron Technology, Inc. The disclosures of each of the forgoing patents are hereby incorporated by reference in their entirety.
A schematic diagram of an exemplary CMOS pixel four-transistor (4T) pixel cell 10 is illustrated in FIG. 2. The four transistors include a reset transistor 34, source follower transistor 36, row select transistor 38 and a transfer transistor 32. A photosensor 40 converts incident light into a charge. A floating diffusion region 50 receives charge from the photosensor 40 through the transfer transistor 32 and is connected to the reset transistor 34 and the source follower transistor 36. The source follower transistor 36 outputs a signal proportional to the charge accumulated in the floating diffusion region 50 to a sampling circuit when the row select transistor 38 is turned on. The reset transistor 34 resets the floating diffusion region 50 to a known potential prior to transfer of charge from the photosensor 40 and this reset signal is output and sampled by the sampling circuit. The photosensor 40 may be a photodiode, a photogate, or a photoconductor. If a photodiode is employed, the photodiode may be formed below a surface of the substrate and may be a buried PNP photodiode, buried NPN photodiode, a buried PN photodiode, or a buried NP photodiode, among others.
Image sensors, such as an image sensor employing the conventional pixel cell 10, have a characteristic dynamic range. Dynamic range refers to the range of incident light that can be accommodated by an image sensor in a single frame of pixel data. It is desirable to have an image sensor with a high dynamic range to image scenes that generate high dynamic range incident signals, such as indoor rooms with windows to the outside, outdoor scenes with mixed shadows and bright sunshine, night-time scenes combining artificial lighting and shadows, and many others.
The dynamic range for an image sensor is commonly defined as the ratio of its largest non-saturating signal to the standard deviation of the noise under dark conditions. The dynamic range is limited on an upper end by the charge saturation level of the sensor, and on a lower end by noise imposed limitations and/or quantization limits of the analog-to-digital converter used to produce the digital image. When the dynamic range of an image sensor is too small to accommodate the variations in light intensities of the imaged scene, e.g., by having a low saturation level, image distortion occurs.
In a conventional CMOS pixel imager with a photodiode, the photodiode converts incident light to an electrical charge. The photodiode accumulates this charge throughout an integration period. At the end of the integration period, the transfer gate is activated, and the charge is transferred from the photodiode to the floating diffusion region.
When the incident light is of low-intensity such that the charge transferred from the photosensor to the floating diffusion region is low, the signal is very faint. In such a case, it is desirable for the conversion gain (i.e., the ratio of output voltage to input charge) to be high. When the incident light is of high-intensity such that the charge transferred from the photosensor to the floating diffusion region is greater than the capacity of the floating diffusion region, excess charge may overflow and saturate the pixel cell. In such a case, it is desirable that the conversion gain be low.
However, with conventional imagers, the floating diffusion regions in a pixel array have a fixed capacitance, which means a fixed conversion gain. That is, for a single integration period, all pixel signals are provided with the same conversion gain. As a result, some pixels may saturate while others may provide a faint signal, limiting the dynamic range of the image sensor. Thus, there is a desire and need for a pixel cell capable of selectively attaining a high conversion gain or a low conversion gain to increase the dynamic range of the image sensor.